Code

Here are some bits of code I wrote. If you find any of it useful, I'd love to hear about it. It is all Copyright (c) 2007 Cotton Seed and released under the GNU General Public License version 2.

Software

• kz4-1.tar.gz
  Code to compute the decomposition of the cohomology of K(Z, 4) into a direct product of submodules, written in Caml. See my blog post for information.

Hardware

• rot-1.tar.gz
  I rewrote the Rotary Encoder Interface Spartan-3E Starter Kit design example in Verilog. I used a slightly different circuit than the design example which is not as compact, but I understand it. Interface modules to other blocks on the Spartan-3E Starter Kit coming soon.
• lcd-1.tar.gz
  A simple interface to the LCD on the Xilinx Spartan-3E Starter Kit with example driver. It handles initialization and the (relatively) slow communication with the LCD, but doesn't support more advanced features like readback, writing CG RAM or display shift.
• vga-1.tar.gz
  Simple VGA test pattern (colored bars) generator. It uses 3bit color as described in the Starter Kit User Guide, although I used 525 line timing described here since it seemed to match better what my monitor expected. I plan to rewire the VGA port to use the D/A for better color resolution.
• sdram-1.tar.gz
  First cut at a controller for the Micron DDR SDRAM on the Spartan-3E Starter Kit. The design uses three DCMs: the first to double the on-board 50Mhz clock to 100Mhz, the second to generate the 100Mhz SDRAM clocks via a off-chip clock feedback and the last to generate the internal 100Mhz clk and clk90. I use the DDR I/O flip-flops to interface to the sd_q SDRAM data signals. I don't have a good way to get much data on or off the board yet, so the simple test driver just blats a bunch of data to the SDRAM and reads off a random location and displays it on the LEDs.
• mips-3.tar.gz
  First cut at 32-bit MIPS processor. It has most of the non-privileged integer instructions (except for, I think, bltzal and bgezal.) No exception support yet. It doesn't interface to the DRAM controller above, but has 4Kb of memory on-FPGA. Completely unoptimized. Mostly untested at this point.

  The program comes out of a ROM implemented in prom.v. The default program implements a simple "roving eye" on the Starter Kit's LEDs. It was generated from roving.c with gcc/binutils configured for mips-elf target. elf2v, linked below, converts an mips-elf binary to a Verilog ROM. I used my own crt0 (see crt0.s) and roving was built thus:

  > mips-elf-gcc crt0.o -nostdlib -O2 roving.c -o roving
> elf2v roving > prom.v

• elf2v-3.tar.gz
  Simple program to convert mips-elf binaries to Verilog ROMs suitable for the MIPS core above. Uses libelf.